1. Field of the Invention
The present invention relates to a method for patterning a sacrificial film on or over a wafer, which involves forming a interconnect pattern including a plurality of parallel straight lines.
2. Related Art
In recent years, a packing density of semiconductor integrated circuits is progressed, and a minimum design rule for circuit elements and interconnects is on the order of sub-100 nm. This requires a short wavelength light such as KrF or ArF laser in a photolithographic technology for transferring a pattern of a mask in a photoresist film on a wafer. Since the short wavelength of the resolution light is needed, there requires a break through in the photolithographic technology, and therefore the shrinking in size of patterns such as interconnect lines including gate electrode lines becomes difficult.
A phase shift mask technology, which is capable of preventing the contrast reduction of a photographic image by suitably changing a phase of the light transmitted through the mask, is proposed in order to proceed the scaling of the semiconductor devices. It is typically known such technology as a Levenson phase shifting mask, which is called after an inventor M. D. Levenson.
FIG. 37 is a plan view of a region containing a corner of the mask aperture pattern in a conventional phase shifting mask. As shown in FIG. 37, a Levenson phase shifting mask 500 is configured that the phase angle of a light passed through one aperture 510 is different from phase angle of a light passed through other aperture 512 by 180° (π) in a region of a pair of apertures 510 and 512 across an opaque region. This achieves absolutely zero intensity of light in the opaque region, when an image is formed on the wafer. In FIG. 37, the aperture 510 for 0° (reference) transmitted light is shown as a plain region, the aperture 512 for 180° (π) transmitted light is shown as a hatched region, and the opaque region is shown as a screen-tone region. In addition to above, such Levenson phase shifting mask 500 includes a peripheral opaque region 520.
FIG. 38 is a diagram, illustrating a pattern formed in a photoresist film after a light exposure by using a phase shifting mask. As shown in FIG. 38, a photoresist film 600 includes a portion of an interconnect pattern 602 and other portions, which should be removed. Thereafter, an additional light exposure process is conducted by employing a trim mask to expose on above-mentioned peripheral opaque region 520, so that a final interconnect pattern 602 is formed in the photoresist film 600.
When the phase shifting mask 500 is employed, some problems arise such as the reduction or constriction of the line width on the edge of the pattern as shown in FIG. 38 and FIG. 39. When the area having the constriction or reduction of the line width is a gate electrode area, the gate width becomes narrow at the constriction portion, thereby changing the properties of a metal oxide semiconductor field effect transistor (MOSFET) from the designed properties. Therefore, various efforts are made to prevent such a pattern constriction and a line width reduction.
A technology for the countermeasures is described in Japanese Patent Laid-Open No. 2001-42,545. In Japanese Patent Laid-Open No. 2001-42,545, dark rectangular assist figures are added to the mask aperture pattern edges in the vicinity of the corners to increase a width of the interval between the adjacent apertures, where the interval corresponds to a line width in photoresist film.